| |
| 1994 | ||
|---|---|---|
| 4 | EE | Ting-Hai Chao, Yu-Chin Hsu: Rectilinear Steiner tree construction by local and global refinement. IEEE Trans. on CAD of Integrated Circuits and Systems 13(3): 303-309 (1994) |
| 1992 | ||
| 3 | EE | Ting-Hai Chao, Yu-Chin Hsu, Jan-Ming Ho: Zero Skew Clock Net Routing. DAC 1992: 518-523 |
| 1991 | ||
| 2 | Yu-Chin Hsu, Youn-Long Lin, Hang-Ching Hsieh, Ting-Hai Chao: Combining Logic Minimization and Folding for PLA's. IEEE Trans. Computers 40(6): 706-713 (1991) | |
| 1990 | ||
| 1 | Ting-Hai Chao, Yu-Chin Hsu: Rectilinear Steiner Tree Construction by Local and Global Refinement. ICCAD 1990: 432-435 | |
| 1 | Jan-Ming Ho | [3] |
| 2 | Hang-Ching Hsieh | [2] |
| 3 | Yu-Chin Hsu | [1] [2] [3] [4] |
| 4 | Youn-Long Lin | [2] |