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Ming-Hung Chang

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2008
5EELi-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang: A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop. ISCAS 2008: 3342-3345
4EEMing-Hung Chang, Li-Pu Chuang, I-Ming Chang, Wei Hwang: A 300-mV 36-muW multiphase dual digital clock output generator with self-calibration. SoCC 2008: 97-100
2007
3EEMing-Hung Chang, Zong-Xi Yang, Wei Hwang: A 1.9mW Portable ADPLL-based Frequency Synthesizer for High Speed Clock Generation. ISCAS 2007: 1137-1140
2EEMing-Hung Chang, Hung-Ching Lu, Cheng-Hung Tsai: Fuzzy neural network design with switching strategy for permanent-magnet synchronous motor speed controller. SMC 2007: 882-887
1EEShien-Kuei Liaw, Ming-Hung Chang, Chun-Jung Wang, Yi-Tseng Lin: Reconfigurable Optical Add/Drop Multiplexer with 8.0 dB Net Gain Using Dual-Pass Amplified Scheme. IEICE Transactions 90-B(8): 2016-2021 (2007)

Coauthor Index

1I-Ming Chang [4]
2Li-Pu Chuang [4] [5]
3Po-Tsang Huang [5]
4Wei Hwang [3] [4] [5]
5Chih-Hao Kan [5]
6Shien-Kuei Liaw [1]
7Yi-Tseng Lin [1]
8Hung-Ching Lu [2]
9Cheng-Hung Tsai [2]
10Chun-Jung Wang [1]
11Zong-Xi Yang [3]

Colors in the list of coauthors

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)