| 2008 |
|---|
| 7 | EE | Po-Tsang Huang,
Shu-Wei Chang,
Wen-Yen Liu,
Wei Hwang:
"Green" micro-architecture and circuit co-design for ternary content addressable memory.
ISCAS 2008: 3322-3325 |
| 6 | EE | Li-Pu Chuang,
Ming-Hung Chang,
Po-Tsang Huang,
Chih-Hao Kan,
Wei Hwang:
A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop.
ISCAS 2008: 3342-3345 |
| 5 | EE | Po-Tsang Huang,
Wei-Li Fang,
Yin-Ling Wang,
Wei Hwang:
Low Power and Reliable Interconnection with Self-Corrected Green Coding Scheme for Network-on-Chip.
NOCS 2008: 77-83 |
| 4 | EE | Mu-Tien Chang,
Po-Tsang Huang,
Wei Hwang:
A robust ultra-low power asynchronous FIFO memory with self-adaptive power control.
SoCC 2008: 175-178 |
| 2006 |
|---|
| 3 | EE | Po-Tsang Huang,
Wei-Keng Chang,
Wei Hwang:
Low Power Pre-Comparison Scheme for NOR-Type 10T Content Addressable Memory.
APCCAS 2006: 1301-1304 |
| 2 | EE | Jen-Wei Yang,
Po-Tsang Huang,
Wei Hwang:
On-Chip DC-DC Converter with Frequency Detector for Dynamic Voltage Scaling Technology.
APCCAS 2006: 666-669 |
| 1 | EE | Po-Tsang Huang,
Wei Hwang:
2-level FIFO architecture design for switch fabrics in network-on-chip.
ISCAS 2006 |
