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| 2004 | ||
|---|---|---|
| 3 | EE | Mohamed Hafed, Antonio H. Chan, Geoffrey Duerden, Bardia Pishdad, Clarence Tam, Sebastien Laberge, Gordon W. Roberts: A High-Throughput 5 GBps Timing and Jitter Test Module Featuring Localized Processing. ITC 2004: 728-737 |
| 2 | Antonio H. Chan, Gordon W. Roberts: A jitter characterization system using a component-invariant Vernier delay line. IEEE Trans. VLSI Syst. 12(1): 79-95 (2004) | |
| 2001 | ||
| 1 | Antonio H. Chan, Gordon W. Roberts: A synthesizable, fast and high-resolution timing measurement device using a component-invariant vernier delay line. ITC 2001: 858-867 | |
| 1 | Geoffrey Duerden | [3] |
| 2 | Mohamed Hafed | [3] |
| 3 | Sebastien Laberge | [3] |
| 4 | Bardia Pishdad | [3] |
| 5 | Gordon W. Roberts | [1] [2] [3] |
| 6 | Clarence Tam | [3] |