| 2000 |
|---|
| 3 | EE | Silvia Cataldo,
Silvia Chiusano,
Paolo Prinetto,
Hans-Joachim Wunderlich:
Optimal Hardware Pattern Generation for Functional BIST.
DATE 2000: 292-297 |
| 2 | EE | Alfredo Benso,
Silvia Cataldo,
Silvia Chiusano,
Paolo Prinetto,
Yervant Zorian:
A High-Level EDA Environment for the Automatic Insertion of HD-BIST Structures.
J. Electronic Testing 16(3): 179-184 (2000) |
| 1999 |
|---|
| 1 | | Alfredo Benso,
Silvia Cataldo,
Silvia Chiusano,
Paolo Prinetto,
Yervant Zorian:
HD-BIST: a hierarchical framework for BIST scheduling and diagnosis in SOCs.
ITC 1999: 1038-1044 |
