1998 | ||
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4 | EE | Nidhi Agrawal, C. P. Ravikumar: Adaptive Routing Based on Deadlock Recovery. Euro-Par 1998: 981-988 |
1997 | ||
3 | EE | Nidhi Agrawal, C. P. Ravikumar: An Euler Path Based Technique for Deadlock-free Multicasting. ICPP 1997: 378-384 |
1996 | ||
2 | EE | Nidhi Agrawal, Parul Agarwal, C. P. Ravikumar: Efficient Delay Test Generation for Modular Circuits. Great Lakes Symposium on VLSI 1996: 220- |
1995 | ||
1 | EE | C. P. Ravikumar, Gurjeet S. Saund, Nidhi Agrawal: A STAFAN-like functional testability measure for register-level circuits. Asian Test Symposium 1995: 192-198 |
1 | Parul Agarwal | [2] |
2 | C. P. Ravikumar | [1] [2] [3] [4] |
3 | Gurjeet S. Saund | [1] |