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Abdessatar Abderrahman

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1999
4EEAbdessatar Abderrahman, Eduard Cerny, Bozena Kaminska: Worst case tolerance analysis and CLP-based multifrequency test generation for analog circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(3): 332-345 (1999)
1997
3EEAbdessatar Abderrahman, Eduard Cerny, Bozena Kaminska: CLP-based Multifrequency Test Generation for Analog Circuits. VTS 1997: 158-165
1996
2EEAbdessatar Abderrahman, Bozena Kaminska, Eduard Cerny: Optimization-based multifrequency test generation for analog circuits. J. Electronic Testing 9(1-2): 59-73 (1996)
1994
1 Abdessatar Abderrahman, Bozena Kaminska, Yvon Savaria: Estimation of Simultaneous Switching Power and Ground Noise of Static CMOS Combinational Circuits. EDAC-ETC-EUROASIC 1994: 658

Coauthor Index

1Eduard Cerny [2] [3] [4]
2Bozena Kaminska [1] [2] [3] [4]
3Yvon Savaria [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)