Robert Yung

1996
5	EE	Robert Yung: Design Decisions Influencing the UltraSPARC's Instruction Fetch Architecture. MICRO 1996: 178-190
4		Robert Yung: The Importance of Process Technology to Architecture. ACM Comput. Surv. 28(4es): 37 (1996)
1995
3		Dale Greenley, J. Bauman, D. Chang, Dennis Chen, R. Eltejaein, P. Ferolito, P. Fu, Robert B. Garner, D. Greenhill, H. Grewal, Kalon Holdbrook, B. Kim, Leslie Kohn, H. Kwan, M. Levitt, Guillermo Maturana, D. Mrazek, Chitresh Narasimhaiah, Kevin Normoyle, N. Parveen, P. Patel, A. Prabhu, Marc Tremblay, Michelle Wong, L. Yang, Krishna Yarlagadda, Robert K. Yu, Robert Yung, Gregory B. Zyner: UltraSPARC: The Next Generation Superscalar 64-bit SPARC. COMPCON 1995: 442-451
2	EE	Robert Yung, Neil C. Wilhelm: Caching processor general registers. ICCD 1995: 307-312
1991
1		Alvin M. Despain, Robert Yung: An integrated prolog architecture for symbolic and numeric executions. Ann. Math. Artif. Intell. 4: 107-133 (1991)

Coauthor Index

1	J. Bauman	[3]
2	D. Chang	[3]
3	Dennis Chen	[3]
4	Alvin M. Despain	[1]
5	R. Eltejaein	[3]
6	P. Ferolito	[3]
7	P. Fu	[3]
8	Robert B. Garner	[3]
9	D. Greenhill	[3]
10	Dale Greenley	[3]
11	H. Grewal	[3]
12	Kalon Holdbrook	[3]
13	B. Kim	[3]
14	Leslie Kohn	[3]
15	H. Kwan	[3]
16	M. Levitt	[3]
17	Guillermo Maturana	[3]
18	D. Mrazek	[3]
19	Chitresh Narasimhaiah	[3]
20	Kevin Normoyle	[3]
21	N. Parveen	[3]
22	P. Patel	[3]
23	A. Prabhu	[3]
24	Marc Tremblay	[3]
25	Neil C. Wilhelm	[2]
26	Michelle Wong	[3]
27	L. Yang	[3]
28	Krishna Yarlagadda	[3]
29	Robert K. Yu	[3]
30	Gregory B. Zyner	[3]

Colors in the list of coauthors