1994 | ||
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1 | Masahito Matsuo, Hiroyuki Kondo, Yukari Takata, Souichi Kobayashi, Mitsugu Satoh, Toyohiko Yoshida, Yuichi Saitoh, Jun-ichi Hinata: A 32-bit Superscalar Microprocessor with 64-Bit Processing and High Bandwidth DRAM Interface. ICCD 1994: 203-210 |
1 | Jun-ichi Hinata | [1] |
2 | Souichi Kobayashi | [1] |
3 | Hiroyuki Kondo | [1] |
4 | Yuichi Saitoh | [1] |
5 | Mitsugu Satoh | [1] |
6 | Yukari Takata | [1] |
7 | Toyohiko Yoshida | [1] |