| |
| 2008 | ||
|---|---|---|
| 4 | EE | Tai-Hsuan Wu, Azadeh Davoodi: PaRS: fast and near-optimal grid-based cell sizing for library-based design. ICCAD 2008: 107-111 |
| 3 | EE | Lin Xie, Azadeh Davoodi, Jun Zhang, Tai-Hsuan Wu: Adjustment-based modeling for statistical static timing analysis with high dimension of variability. ICCAD 2008: 181-184 |
| 2 | EE | Anuj Kumar, Tai-Hsuan Wu, Azadeh Davoodi: SynECO: Incremental technology mapping with constrained placement and fast detail routing for predictable timing improvement. ICCD 2008: 551-556 |
| 1 | EE | Tai-Hsuan Wu, Lin Xie, Azadeh Davoodi: A parallel and randomized algorithm for large-scale discrete dual-Vt assignment and continuous gate sizing. ISLPED 2008: 45-50 |
| 1 | Azadeh Davoodi | [1] [2] [3] [4] |
| 2 | Anuj Kumar | [2] |
| 3 | Lin Xie | [1] [3] |
| 4 | Jun Zhang | [3] |