| 2009 |
|---|
| 5 | EE | Weihuang Wang,
Gwan S. Choi,
Kiran K. Gunnam:
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels.
VLSI Design 2009: 51-56 |
| 2007 |
|---|
| 4 | EE | Weihuang Wang,
Gwan Choi:
Minimum-energy LDPC decoder for real-time mobile application.
DATE 2007: 343-348 |
| 3 | EE | Pankaj Bhagawat,
Weihuang Wang,
Momin Uppal,
Gwan Choi,
Zixiang Xiong,
Mark B. Yeary,
Alan Harris:
An FPGA Implementation of Dirty Paper Precoder.
ICC 2007: 2761-2766 |
| 2 | EE | Kiran K. Gunnam,
Gwan Choi,
Weihuang Wang,
Mark B. Yeary:
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard.
ISCAS 2007: 1645-1648 |
| 1 | EE | Weihuang Wang,
Gwan Choi:
Speculative Energy Scheduling for LDPC Decoding.
ISQED 2007: 79-84 |
