2009 |
4 | EE | Weihuang Wang,
Gwan S. Choi,
Kiran K. Gunnam:
Low-Power VLSI Design of LDPC Decoder Using DVFS for AWGN Channels.
VLSI Design 2009: 51-56 |
2007 |
3 | EE | Kiran K. Gunnam,
Gwan S. Choi,
Mark B. Yeary,
Mohammed Atiquzzaman:
VLSI Architectures for Layered Decoding for Irregular LDPC Codes of WiMax.
ICC 2007: 4542-4547 |
2 | EE | Kiran K. Gunnam,
Gwan Choi,
Weihuang Wang,
Mark B. Yeary:
Multi-Rate Layered Decoder Architecture for Block LDPC Codes of the IEEE 802.11n Wireless Standard.
ISCAS 2007: 1645-1648 |
1 | EE | Kiran K. Gunnam,
Gwan S. Choi,
Mark B. Yeary:
A Parallel VLSI Architecture for Layered Decoding for Array LDPC Codes.
VLSI Design 2007: 738-743 |