2008 |
5 | EE | Michael Pellauer,
Muralidaran Vijayaraghavan,
Michael Adler,
Arvind,
Joel S. Emer:
A-Ports: an efficient abstraction for cycle-accurate performance models on FPGAs.
FPGA 2008: 87-96 |
4 | EE | Michael Pellauer,
Muralidaran Vijayaraghavan,
Michael Adler,
Arvind,
Joel S. Emer:
Quick Performance Models Quickly: Closely-Coupled Partitioned Simulation on FPGAs.
ISPASS 2008: 1-10 |
3 | EE | Kermin Fleming,
Myron King,
Man Cheuk Ng,
Asif Khan,
Muralidaran Vijayaraghavan:
High-throughput Pipelined Mergesort.
MEMOCODE 2008: 155-158 |
2007 |
2 | EE | Man Cheuk Ng,
Muralidaran Vijayaraghavan,
Nirav Dave,
Arvind,
Gopal Raghavan,
Jamey Hicks:
From WiFi to WiMAX: Techniques for High-Level IP Reuse across Different OFDM Protocols.
MEMOCODE 2007: 71-80 |
1 | EE | Nirav Dave,
Kermin Fleming,
Myron King,
Michael Pellauer,
Muralidaran Vijayaraghavan:
Hardware Acceleration of Matrix Multiplication on a Xilinx FPGA.
MEMOCODE 2007: 97-100 |