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Shobha Vasudevan

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2009
7EEVinod Viswanath, Shobha Vasudevan, Jacob A. Abraham: Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL. VLSI Design 2009: 77-82
2007
6EEShobha Vasudevan, Vinod Viswanath, Jacob A. Abraham: Efficient Microprocessor Verification using Antecedent Conditioned Slicing. VLSI Design 2007: 43-49
5EEShobha Vasudevan, Vinod Viswanath, Robert W. Sumners, Jacob A. Abraham: Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems. IEEE Trans. Computers 56(10): 1401-1414 (2007)
4EEShobha Vasudevan, E. Allen Emerson, Jacob A. Abraham: Improved verification of hardware designs through antecedent conditioned slicing. STTT 9(1): 89-101 (2007)
2006
3EEShobha Vasudevan, Jacob A. Abraham, Vinod Viswanath, Jiajin Tu: Automatic decomposition for sequential equivalence checking of system level and RTL descriptions. MEMOCODE 2006: 71-80
2005
2EEShobha Vasudevan, E. Allen Emerson, Jacob A. Abraham: Efficient Model Checking of Hardware Using Conditioned Slicing. Electr. Notes Theor. Comput. Sci. 128(6): 279-294 (2005)
2004
1 Shobha Vasudevan, Jacob A. Abraham: Static program transformations for efficient software model checking. IFIP Congress Topical Sessions 2004: 257-282

Coauthor Index

1Jacob A. Abraham [1] [2] [3] [4] [5] [6] [7]
2E. Allen Emerson [2] [4]
3Robert W. Sumners [5]
4Jiajin Tu [3]
5Vinod Viswanath [3] [5] [6] [7]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)