| 2009 |
|---|
| 7 | EE | Vinod Viswanath,
Shobha Vasudevan,
Jacob A. Abraham:
Dedicated Rewriting: Automatic Verification of Low Power Transformations in RTL.
VLSI Design 2009: 77-82 |
| 2007 |
|---|
| 6 | EE | Shobha Vasudevan,
Vinod Viswanath,
Jacob A. Abraham:
Efficient Microprocessor Verification using Antecedent Conditioned Slicing.
VLSI Design 2007: 43-49 |
| 5 | EE | Shobha Vasudevan,
Vinod Viswanath,
Robert W. Sumners,
Jacob A. Abraham:
Automatic Verification of Arithmetic Circuits in RTL Using Stepwise Refinement of Term Rewriting Systems.
IEEE Trans. Computers 56(10): 1401-1414 (2007) |
| 4 | EE | Shobha Vasudevan,
E. Allen Emerson,
Jacob A. Abraham:
Improved verification of hardware designs through antecedent conditioned slicing.
STTT 9(1): 89-101 (2007) |
| 2006 |
|---|
| 3 | EE | Shobha Vasudevan,
Jacob A. Abraham,
Vinod Viswanath,
Jiajin Tu:
Automatic decomposition for sequential equivalence checking of system level and RTL descriptions.
MEMOCODE 2006: 71-80 |
| 2005 |
|---|
| 2 | EE | Shobha Vasudevan,
E. Allen Emerson,
Jacob A. Abraham:
Efficient Model Checking of Hardware Using Conditioned Slicing.
Electr. Notes Theor. Comput. Sci. 128(6): 279-294 (2005) |
| 2004 |
|---|
| 1 | | Shobha Vasudevan,
Jacob A. Abraham:
Static program transformations for efficient software model checking.
IFIP Congress Topical Sessions 2004: 257-282 |
