| 2008 |
|---|
| 8 | EE | Zdenek Vasícek,
Lukás Sekanina:
Novel Hardware Implementation of Adaptive Median Filters.
DDECS 2008: 110-115 |
| 7 | EE | Zdenek Vasícek,
Lukás Sekanina:
Hardware Accelerators for Cartesian Genetic Programming.
EuroGP 2008: 230-241 |
| 6 | EE | Michal Bidlo,
Zdenek Vasícek:
Cellular Automata-Based Development of Combinational and Polymorphic Circuits: A Comparative Study.
ICES 2008: 106-117 |
| 5 | EE | Zdenek Vasícek,
Martin Zádník,
Lukás Sekanina,
Jirí Tobola:
On Evolutionary Synthesis of Linear Transforms in FPGA.
ICES 2008: 141-152 |
| 2007 |
|---|
| 4 | EE | Zdenek Vasícek,
Lukás Sekanina:
Evaluation of a New Platform For Image Filter Evolution.
AHS 2007: 577-586 |
| 3 | EE | Zdenek Vasícek,
Lukás Sekanina:
An area-efficient alternative to adaptive median filtering in FPGAs.
FPL 2007: 216-221 |
| 2 | EE | Zdenek Vasícek,
Lukás Sekanina:
Reducing the Area on a Chip Using a Bank of Evolved Filters.
ICES 2007: 222-232 |
| 2006 |
|---|
| 1 | EE | Lukás Sekanina,
Zdenek Vasícek:
On the Practical Limits of the Evolutionary Digital Filter Design at the Gate Level.
EvoWorkshops 2006: 344-355 |
