| |
| 2000 | ||
|---|---|---|
| 6 | EE | Hsin-Po Wang, Jon Turino: DFT and BIST techniques for the future. Asian Test Symposium 2000: 6-7 |
| 1999 | ||
| 5 | Jon Turino: Design for test and time to market-friends or foes. ITC 1999: 1098-1101 | |
| 4 | EE | Jon Turino: Design for Test and Time to Market: A Personal Perspective. IEEE Design & Test of Computers 16(3): 23-27 (1999) |
| 1997 | ||
| 3 | EE | Jon Turino: Test Economics in the 21st Century. IEEE Design & Test of Computers 14(3): 41-44 (1997) |
| 1993 | ||
| 2 | Jon Turino: DFT: Profit or Loss -- A Position Paper. ITC 1993: 269 | |
| 1984 | ||
| 1 | Jon Turino: A Totally Universal Reset, Initialization (and) Nodal Observation Circuit. ITC 1984: 878-884 | |
| 1 | Hsin-Po Wang | [6] |