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2004 | ||
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3 | Lan-Da Van, Hsin-Fu Luo, Chien-Ming Wu, Wen-Hsiang Hu, Chun-Ming Huang, Wei-Chang Tsai: A high-performance area-aware DSP processor architecture for video codecs. ICME 2004: 1499-1502 | |
2003 | ||
2 | EE | Wei-Chang Tsai, Chun-Ming Huang, Jiann-Jenn Wang, Chen-Yi Lee: Infrastructure for Education and Research of SOC/IP in Taiwan. MSE 2003: 150- |
2000 | ||
1 | EE | Wei-Chang Tsai, C. B. Shung, Sheng-Jyh Wang: Two systolic architectures for modular multiplication. IEEE Trans. VLSI Syst. 8(1): 103-107 (2000) |
1 | Wen-Hsiang Hu | [3] |
2 | Chun-Ming Huang | [2] [3] |
3 | Chen-Yi Lee | [2] |
4 | Hsin-Fu Luo | [3] |
5 | C. B. Shung | [1] |
6 | Lan-Da Van | [3] |
7 | Jiann-Jenn Wang | [2] |
8 | Sheng-Jyh Wang | [1] |
9 | Chien-Ming Wu | [3] |