| 2007 |
|---|
| 7 | EE | Sandip Tiwari:
Nanoelectronics Device Technologies: CMOS, Beyond and the Mysterious Case of Ockham's Razor.
VLSI Design 2007: 24-25 |
| 2005 |
|---|
| 6 | EE | Christianto C. Liu,
Jeng-Huei Chen,
Rajit Manohar,
Sandip Tiwari:
Mapping system-on-chip designs from 2-D to 3-D ICs.
ISCAS (3) 2005: 2939-2942 |
| 5 | EE | Christianto C. Liu,
Ilya Ganusov,
Martin Burtscher,
Sandip Tiwari:
Bridging the Processor-Memory Performance Gapwith 3D IC Technology.
IEEE Design & Test of Computers 22(6): 556-564 (2005) |
| 4 | EE | Uygar Avci,
Sandip Tiwari:
A novel compact circuit for 4-PAM energy-efficient high speed interconnect data transmission and reception.
Microelectronics Journal 36(1): 67-75 (2005) |
| 2004 |
|---|
| 3 | EE | Arvind Kumar,
Sandip Tiwari:
Testing and Defect Tolerance: A Rent's Rule Based Analysis and Implications on Nanoelectronics.
DFT 2004: 280-288 |
| 2 | | Arvind Kumar,
Sandip Tiwari:
A power-performance adaptive low voltage analog circuit design using independently controlled double gate CMOS technology.
ISCAS (1) 2004: 197-200 |
| 1 | EE | Arvind Kumar,
Sandip Tiwari:
Defect tolerance for nanocomputer architecture.
SLIP 2004: 89-96 |
