| |
| 1998 | ||
|---|---|---|
| 3 | Hisakazu Edamatsu, Katsumi Homma, Masaru Kakimoto, Yutaka Koike, Kinya Tabuchi: Pre-layout Delay Calculation Specification for CMOS ASIC Libraries. ASP-DAC 1998: 241-248 | |
| 1995 | ||
| 2 | EE | Kinya Tabuchi: Electronic data book: current status of standard representation and future perspective. ASP-DAC 1995 |
| 1968 | ||
| 1 | Koichi Mikami, Kinya Tabuchi: A computer program for optimal routing of printed circuit conductors. IFIP Congress (2) 1968: 1475-1478 | |
| 1 | Hisakazu Edamatsu | [3] |
| 2 | Katsumi Homma | [3] |
| 3 | Masaru Kakimoto | [3] |
| 4 | Yutaka Koike | [3] |
| 5 | Koichi Mikami | [1] |