| 1998 |
|---|
| 3 | | Hisakazu Edamatsu,
Katsumi Homma,
Masaru Kakimoto,
Yutaka Koike,
Kinya Tabuchi:
Pre-layout Delay Calculation Specification for CMOS ASIC Libraries.
ASP-DAC 1998: 241-248 |
| 1996 |
|---|
| 2 | EE | Hisakazu Edamatsu,
Satoshi Ikawa,
Katsuya Hasegawa:
Design Methodologies for consumer-use video signal processing LSIs.
DAC 1996: 497-502 |
| 1994 |
|---|
| 1 | | Hideyuki Kabuo,
Takashi Taniguchi,
Akira Miyoshi,
Hitoshi Yamashita,
Miki Urano,
Hisakazu Edamatsu,
Shigeo Kuninobu:
Accurate Ronding Scheme for the Newton-Raphson Method Using Redundant Binary Representation.
IEEE Trans. Computers 43(1): 43-51 (1994) |
