| |
| 1998 | ||
|---|---|---|
| 1 | Hisakazu Edamatsu, Katsumi Homma, Masaru Kakimoto, Yutaka Koike, Kinya Tabuchi: Pre-layout Delay Calculation Specification for CMOS ASIC Libraries. ASP-DAC 1998: 241-248 | |
| 1 | Hisakazu Edamatsu | [1] |
| 2 | Katsumi Homma | [1] |
| 3 | Yutaka Koike | [1] |
| 4 | Kinya Tabuchi | [1] |