| 1988 |
|---|
| 6 | | Teruo Tamama,
Naoaki Narumi,
Taiichi Otsuji,
Masao Suzuki,
Tsuneta Sudo:
Key Technologies for 500 MHz VLSI Test System "ULTIMATE".
ITC 1988: 108-113 |
| 5 | | T. Adachi,
M. Tanno,
Tsuneta Sudo:
Software Environment for 500 MHz VLSI Test System "ULTIMATE".
ITC 1988: 114-119 |
| 4 | | Yoshimitsu Sakagawa,
Yusio Akazawa,
Naoaki Narumi,
Akira Yoshii,
Tsuneta Sudo:
Packaging Technologies for the 500 MHz VLSI Test System "ULTIMATE".
ITC 1988: 120-125 |
| 1985 |
|---|
| 3 | EE | Toshio Kondo,
Tayoshi Nakashima,
Toshio Tsuchiya,
Yoshi Sugiyama,
Tsuneta Sudo:
A large scale cellular array processor: AAP-1.
ACM Conference on Computer Science 1985: 100-111 |
| 2 | EE | Kiyoyuki Yokoyama,
Masaaki Tomizawa,
Akira Yoshii,
Tsuneta Sudo:
Semiconductor Device Simulation at NTT.
IEEE Trans. on CAD of Integrated Circuits and Systems 4(4): 452-461 (1985) |
| 1981 |
|---|
| 1 | | Shigeru Sugamori,
Kenji Yoshida,
Hiromi Maruyama,
Shinpei Kamata,
Tsuneta Sudo:
Analysis and Definition of Overall Timing Accuracy in VLSI Test System.
ITC 1981: 143-153 |
