2003 |
16 | EE | Hajime Shimada,
Hideki Ando,
Toshio Shimada:
Pipeline stage unification: a low-energy consumption technique for future mobile processors.
ISLPED 2003: 326-329 |
2002 |
15 | EE | Ryo Fujioka,
Kiyokazu Katayama,
Ryotaro Kobayashi,
Hideki Ando,
Toshio Shimada:
A preactivating mechanism for a VT-CMOS cache using address prediction.
ISLPED 2002: 247-250 |
1999 |
14 | EE | Ryotaro Kobayashi,
Yukihiro Ogawa,
Hideki Ando,
Toshio Shimada,
Mitsuaki Iwata:
An On-Chip Multiprocessor Architecture with a Non-Blocking Synchronization Mechanism.
EUROMICRO 1999: 1432-1440 |
1993 |
13 | EE | Kei Hiraki,
Toshio Shimada,
Satoshi Sekiguchi:
Empirical Study of Latency Hiding on a Fine-Grain Parallel Processor.
International Conference on Supercomputing 1993: 220-229 |
12 | | Kenji Nishida,
Kenji Toda,
Toshio Shimada,
Yoshinori Yamaguchi:
The Hardware Architecture of the CODA Real-Time Parallel Processor.
PARCO 1993: 395-402 |
1992 |
11 | EE | Kenji Toda,
Kenji Nishida,
Shuichi Sakai,
Toshio Shimada:
A priority forwarding scheme for real-time multistage interconnection networks.
IEEE Real-Time Systems Symposium 1992: 208-217 |
10 | | Toshio Shimada,
Kenji Toda,
Kenji Nishida:
Real-Time Parallel Architecture for Sensor Funsion.
J. Parallel Distrib. Comput. 15(2): 143-152 (1992) |
1991 |
9 | EE | Satoshi Sekiguchi,
Toshio Shimada,
Kei Hiraki:
Sequential description and parallel execution language DFCII dataflow supercomputers.
ICS 1991: 57-66 |
8 | | Kenji Toda,
Kenji Nishida,
Yoshinobu Uchibori,
Shuichi Sakai,
Toshio Shimada:
Parallel Multi-Context Architecture with High-Speed Synchronization Mechanism.
IPPS 1991: 336-343 |
1990 |
7 | EE | Toshitsugu Yuba,
Toshio Shimada,
Yoshinori Yamaguchi,
Kei Hiraki,
Shuichi Sakai:
Dataflow computer development in Japan.
ICS 1990: 140-147 |
1988 |
6 | EE | Kei Hiraki,
Satoshi Sekiguchi,
Toshio Shimada:
Efficient vector processing on dataflow supercomputer SIGMA-1.
SC 1988: 374-381 |
1986 |
5 | | Kei Hiraki,
Kenji Nishida,
Satoshi Sekiguchi,
Toshio Shimada:
Maintenance Architecture and Its LSI Implementation of a Dataflow Computer with a Large Number of Processors.
ICPP 1986: 584-591 |
4 | | Toshio Shimada,
Kei Hiraki,
Kenji Nishida,
Satoshi Sekiguchi:
Evaluation of a Prototype Data Flow Processor of the SIGMA-1 for Scientific Computations.
ISCA 1986: 226-234 |
1984 |
3 | | Toshio Shimada,
Kei Hiraki,
Kenji Nishida:
An Architecture of a Data Flow Machine and Its Evaluation.
COMPCON 1984: 486-490 |
2 | | Kei Hiraki,
Kenji Nishida,
Toshio Shimada:
Evaluation of Associative Memory Using Parallel Chained Hashing.
IEEE Trans. Computers 33(9): 851-855 (1984) |
1983 |
1 | | Toshitsugu Yuba,
Yoshinori Yamaguchi,
Toshio Shimada:
A Control Mechanism of a Lisp-Based Data-Driven Machine.
Inf. Process. Lett. 16(3): 139-143 (1983) |