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Barry Shackleford

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2002
7EEBarry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider: High-Performance Cellular Automata Random Number Generators for Embedded Probabilistic Computing Systems. Evolvable Hardware 2002: 191-200
6EEBarry Shackleford, Motoo Tanaka, Richard J. Carter, Greg Snider: FPGA implementation of neighborhood-of-four cellular automata random number generators. FPGA 2002: 106-112
2001
5EEGreg Snider, Barry Shackleford, Richard J. Carter: Attacking the semantic gap between application programming languages and configurable hardware. FPGA 2001: 115-124
4 Barry Shackleford, Greg Snider, Richard J. Carter, Etsuko Okushi, Mitsuhiro Yasuda, Katsuhiko Seo, Hiroto Yasuura: A High-Performance, Pipelined, FPGA-Based Genetic Algorithm Machine. Genetic Programming and Evolvable Machines 2(1): 33-60 (2001)
2000
3EEBarry Shackleford, Etsuko Okushi, Mitsuhiro Yasuda, Hisao Koizumi, Katsuhiko Seo, Takashi Iwamoto, Hiroto Yasuura: An FPGA-based genetic algorithm machine (poster abstract). FPGA 2000: 218
1998
2 Mitsuhiro Yasuda, Katsuhiko Seo, Hisao Koizumi, Barry Shackleford, Fumio Suzuki: A Top-down Hardware/Software Co-Simulation Method for Embedded Systems Based Upon a Component Logical Bus Architecture. ASP-DAC 1998: 169-175
1997
1EEBarry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi, Hisao Koizumi, Hiroyuki Tomiyama, Hiroto Yasuura: Memory-CPU Size Optimization for Embedded System Designs. DAC 1997: 246-251

Coauthor Index

1Richard J. Carter [4] [5] [6] [7]
2Takashi Iwamoto [3]
3Hisao Koizumi [1] [2] [3]
4Etsuko Okushi [1] [3] [4]
5Katsuhiko Seo [2] [3] [4]
6Greg Snider [4] [5] [6] [7]
7Fumio Suzuki [2]
8Motoo Tanaka [6] [7]
9Hiroyuki Tomiyama [1]
10Mitsuhiro Yasuda [1] [2] [3] [4]
11Hiroto Yasuura [1] [3] [4]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)