| 2007 |
|---|
| 8 | EE | Oleg Maslennikow,
Volodymyr Lepekha,
Anatoli Sergyienko,
Adam Tomas,
Roman Wyrzykowski:
Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor.
PPAM 2007: 137-147 |
| 2006 |
|---|
| 7 | EE | Oleg Maslennikow,
Anatoli Sergyienko:
Mapping DSP Algorithms into FPGA.
PARELEC 2006: 208-213 |
| 2005 |
|---|
| 6 | EE | Oleg Maslennikow,
Volodymyr Lepekha,
Anatoli Sergyienko:
FPGA Implementation of the Conjugate Gradient Method.
PPAM 2005: 526-533 |
| 2003 |
|---|
| 5 | EE | Oleg Maslennikow,
Juri Shevtshenko,
Anatoli Sergyienko:
Configurable Microprocessor Array for DSP Applications.
PPAM 2003: 36-41 |
| 2002 |
|---|
| 4 | EE | Oleg Maslennikov,
Juri Shevtshenko,
Anatoli Sergyienko:
Configurable Microcontroller Array.
PARELEC 2002: 47-49 |
| 2001 |
|---|
| 3 | EE | Anatoli Sergyienko,
Oleg Maslennikov:
Implementation of Givens QR-Decomposition in FPGA.
PPAM 2001: 458-465 |
| 1998 |
|---|
| 2 | EE | Anatoli Sergyienko,
Juri Kanevski,
Oleg Maslennikov,
Roman Wyrzykowski:
A Method for Mapping DSP Algorithms into Application Specific Structures.
EUROMICRO 1998: 10365- |
| 1996 |
|---|
| 1 | | Juri Kanevski,
Oleg Maslennikov,
Anatoli Sergyienko:
Processor Array for Signal Computing and Numerical Applications.
Parcella 1996: 47-58 |
