![]() |
Oleg Maslennikow
Technical University of Koszalin, Poland
List of publications from the DBLP Bibliography Server - FAQ
| 2007 | ||
|---|---|---|
| 12 | EE | Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko, Adam Tomas, Roman Wyrzykowski: Parallel Implementation of Cholesky LLT-Algorithm in FPGA-Based Processor. PPAM 2007: 137-147 |
| 2006 | ||
| 11 | EE | Oleg Maslennikow, Anatoli Sergyienko: Mapping DSP Algorithms into FPGA. PARELEC 2006: 208-213 |
| 2005 | ||
| 10 | EE | Oleg Maslennikow, Volodymyr Lepekha, Anatoli Sergyienko: FPGA Implementation of the Conjugate Gradient Method. PPAM 2005: 526-533 |
| 2003 | ||
| 9 | EE | Oleg Maslennikow, Juri Shevtshenko, Anatoli Sergyienko: Configurable Microprocessor Array for DSP Applications. PPAM 2003: 36-41 |
| 2002 | ||
| 8 | EE | Oleg Maslennikov, Juri Shevtshenko, Anatoli Sergyienko: Configurable Microcontroller Array. PARELEC 2002: 47-49 |
| 2001 | ||
| 7 | EE | Oleg Maslennikov: Systematic Generation of Executing Programs for Processor Elements in Parallel ASIC or FPGA-Based Systems and Their Transformation into VHDL-Descriptions of Processor Element Control Units. PPAM 2001: 272-279 |
| 6 | EE | Anatoli Sergyienko, Oleg Maslennikov: Implementation of Givens QR-Decomposition in FPGA. PPAM 2001: 458-465 |
| 1998 | ||
| 5 | EE | Anatoli Sergyienko, Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski: A Method for Mapping DSP Algorithms into Application Specific Structures. EUROMICRO 1998: 10365- |
| 4 | EE | Oleg Maslennikow, Juri Kaniewski, Roman Wyrzykowski: Fault Tolerant QR-Decomposition Algorithm and Its Parallel Implementation. Euro-Par 1998: 798-803 |
| 1997 | ||
| 3 | Roman Wyrzykowski, Juri Kanevski, Oleg Maslennikov: A new orthogonal version of the Gauss-Jordan algorithm and its parallel implementation. PDP 1997: 445-452 | |
| 1996 | ||
| 2 | Juri Kanevski, Oleg Maslennikov, Roman Wyrzykowski: Algorithm-Based Fault Tolerant Solution of Linear Systems on Processor Arrays. Parcella 1996: 165-173 | |
| 1 | Juri Kanevski, Oleg Maslennikov, Anatoli Sergyienko: Processor Array for Signal Computing and Numerical Applications. Parcella 1996: 47-58 | |
| 1 | Juri Kanevski | [1] [2] [3] [5] |
| 2 | Juri Kaniewski | [4] |
| 3 | Volodymyr Lepekha | [10] [12] |
| 4 | Anatoli Sergyienko | [1] [5] [6] [8] [9] [10] [11] [12] |
| 5 | Juri Shevtshenko | [8] [9] |
| 6 | Adam Tomas | [12] |
| 7 | Roman Wyrzykowski | [2] [3] [4] [5] [12] |