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| 2007 | ||
|---|---|---|
| 2 | EE | M. Thenappan, Arasu T. Senthil, K. M. Sreekanth, Ramesh S. Guzar: An Overlap Removal Algorithm for Macrocell Placement in VLSI Layouts. ICCTA 2007: 104-110 |
| 1 | EE | Arasu T. Senthil, C. P. Ravikumar, S. K. Nandy: Low-Power Hierarchical Scan Test for Multiple Clock Domains. J. Low Power Electronics 3(1): 106-118 (2007) |
| 1 | Ramesh S. Guzar | [2] |
| 2 | S. K. Nandy (Soumitra Kumar Nandy) | [1] |
| 3 | C. P. Ravikumar | [1] |
| 4 | K. M. Sreekanth | [2] |
| 5 | M. Thenappan | [2] |