| |
| 1995 | ||
|---|---|---|
| 3 | EE | Mirjam Schönfeld, Jens Franzen, Markus Schwiegershausen, Peter Pirsch, Uwe Vehlies, Andreas Münzner: The LISA design environment for the synthesis of array processors including memories for the data transfer and fault tolerance by reconfiguration and coding techniques. VLSI Signal Processing 11(1-2): 51-74 (1995) |
| 1991 | ||
| 2 | Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch: Synthesis of intermediate memories for the data supply to processor arrays. Algorithms and Parallel VLSI Architectures 1991: 365-370 | |
| 1 | Mirjam Schönfeld, Markus Schwiegershausen, Peter Pirsch: Synthesis of Intermediate Memories needed for the Data Supply to Processor Arrays. VLSI 1991: 297-306 | |
| 1 | Jens Franzen | [3] |
| 2 | Andreas Münzner | [3] |
| 3 | Peter Pirsch | [1] [2] [3] |
| 4 | Markus Schwiegershausen | [1] [2] [3] |
| 5 | Uwe Vehlies | [3] |