2004 |
3 | EE | Masaji Kume,
Katsutoshi Uehara,
Minoru Itakura,
Hideo Sawamoto,
Toru Kobayashi,
Masatoshi Hasegawa,
Hideki Hayashi:
Programmable At-Speed Array and Functional BIST for Embedded DRAM LSI.
ITC 2004: 988-996 |
1998 |
2 | EE | Shoji Yoshida,
Shigeya Tanaka,
Kotaro Matsuo,
Takashi Hotta,
Hideo Sawamoto,
Teruhisa Shimizu:
Instruction fetch and dispatch scheme with flag-in-cache/in-IBR.
Systems and Computers in Japan 29(4): 86-94 (1998) |
1995 |
1 | EE | Kotaro Shimamura,
Shigeya Tanaka,
Tetsuya Shimomura,
Takashi Hotta,
Eiki Kamada,
Hideo Sawamoto,
Teruhisa Shimizu,
Kisaburo Nakazawa:
A superscalar RISC processor with pseudo vector processing feature.
ICCD 1995: 102-109 |