| 2008 |
|---|
| 8 | EE | Marcos B. S. Tavares,
Steffen Kunze,
Emil Matús,
Gerhard Fettweis:
Architecture and VLSI realization of a high-speed programmable decoder for LDPC convolutional codes.
ASAP 2008: 215-220 |
| 7 | EE | Marcos B. S. Tavares,
Emil Matús,
Steffen Kunze,
Gerhard Fettweis:
A dual-core programmable decoder for LDPC convolutional codes.
ISCAS 2008: 532-535 |
| 2007 |
|---|
| 6 | EE | Marcel Bimberg,
Marcos B. S. Tavares,
Emil Matús,
Gerhard Fettweis:
A High-Throughput Programmable Decoder for LDPC Convolutional Codes.
ASAP 2007: 239-246 |
| 5 | EE | Emil Matús,
Marcos B. S. Tavares,
Marcel Bimberg,
Gerhard Fettweis:
Towards a GBit/s Programmable Decoder for LDPC Convolutional Codes.
ISCAS 2007: 1657-1660 |
| 2006 |
|---|
| 4 | EE | Jie Guo,
Torsten Limberg,
Emil Matús,
B. Mennenga,
R. Klemm,
Gerhard Fettweis:
Code Generation for STA Architecture.
Euro-Par 2006: 299-310 |
| 2005 |
|---|
| 3 | | Emil Matús,
Gordon Cichon,
Hendrik Seidel,
Pablo Robelly,
Torsten Limberg,
Gerhard Fettweis:
A Compiler-friendly and Low-power DSP architecture.
GI Jahrestagung (1) 2005: 459 |
| 2004 |
|---|
| 2 | EE | Gordon Cichon,
Pablo Robelly,
Hendrik Seidel,
Emil Matús,
Marcus Bronzel,
Gerhard Fettweis:
Synchronous Transfer Architecture (STA).
SAMOS 2004: 343-352 |
| 1 | EE | Hendrik Seidel,
Emil Matús,
Gordon Cichon,
Pablo Robelly,
Marcus Bronzel,
Gerhard Fettweis:
Generated DSP Cores for Implementation of an OFDM Communication System.
SAMOS 2004: 353-362 |
