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Akash Randhar

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1998
2EEJohn M. Emmert, Akash Randhar, Dinesh Bhatia: Fast Floorplanning for FPGAs. FPL 1998: 129-138
1997
1EEJianzhong Shi, Akash Randhar, Dinesh Bhatia: Macro Block Based FPGA Floorplanning. VLSI Design 1997: 21-26

Coauthor Index

1Dinesh Bhatia [1] [2]
2John M. Emmert [2]
3Jianzhong Shi [1]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)