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| 1997 | ||
|---|---|---|
| 2 | EE | Jianzhong Shi, Dinesh Bhatia: Performance Driven Floorplanning for FPGA Based Designs. FPGA 1997: 112-118 |
| 1 | EE | Jianzhong Shi, Akash Randhar, Dinesh Bhatia: Macro Block Based FPGA Floorplanning. VLSI Design 1997: 21-26 |
| 1 | Dinesh Bhatia | [1] [2] |
| 2 | Akash Randhar | [1] |