M. M. Peiro
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1999
1
EE
Javier Valls
,
T. Sansaloni
, M. M. Peiro,
Eduardo I. Boemo
: Fast FPGA-based pipelined digit-serial/parallel multipliers.
ISCAS (1) 1999
: 482-485
Coauthor
Index
1
Eduardo I. Boemo
[
1
]
2
T. Sansaloni
[
1
]
3
Javier Valls
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
