| |
| 2003 | ||
|---|---|---|
| 2 | EE | E. Kinvi-Boh, M. Aline, Olivier Sentieys, Edgar "Dan" Olson: MVL circuit design and characterization at the transistor level using SUS-LOC. ISMVL 2003: 105-110 |
| 1999 | ||
| 1 | EE | Edgar "Dan" Olson: Supplementary Symmetrical Logic Circuit Structure. ISMVL 1999: 42-47 |
| 1 | M. Aline | [2] |
| 2 | E. Kinvi-Boh | [2] |
| 3 | Olivier Sentieys | [2] |