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2004 | ||
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3 | EE | Daisuke Watanabe, Masakatsu Suda, Toshiyuki Okayasu: 34.1Gbps Low Jitter, Low BER High-Speed Parallel CMOS Interface for Interconnections in High-Speed Memory Test System. ITC 2004: 1255-1262 |
2002 | ||
2 | EE | Toshiyuki Okayasu, Masakatsu Suda, Kazuhiro Yamamoto: CMOS Circuit Technology for Precise GHz Timing Generator. ITC 2002: 894-902 |
1994 | ||
1 | Takashi Sekino, Toshiyuki Okayasu: Ultra Hi-Speed Pin-Electronics and Test Station Using GaAs IC. ITC 1994: 683-690 |
1 | Takashi Sekino | [1] |
2 | Masakatsu Suda | [2] [3] |
3 | Daisuke Watanabe | [3] |
4 | Kazuhiro Yamamoto | [2] |