| 2009 |
|---|
| 5 | EE | Hiroki Nakahara,
Tsutomu Sasao,
Munehiro Matsuura,
Yoshifumi Kawamura:
A Parallel Branching Program Machine for Emulation of Sequential Circuits.
ARC 2009: 261-267 |
| 2007 |
|---|
| 4 | EE | Hiroki Nakahara,
Tsutomu Sasao,
Munehiro Matsuura:
A CAM Emulator Using Look-Up Table Cascades.
IPDPS 2007: 1-8 |
| 2006 |
|---|
| 3 | EE | Hiroki Nakahara,
Tsutomu Sasao,
Munehiro Matsuura:
A fast logic simulator using a look up table cascade emulator.
ASP-DAC 2006: 466-472 |
| 2 | EE | Hiroki Nakahara,
Tsutomu Sasao,
Munehiro Matsuura:
A PC-Based Logic Simulator Using a Look-Up Table Cascade Emulator.
IEICE Transactions 89-A(12): 3471-3481 (2006) |
| 2005 |
|---|
| 1 | EE | Hiroki Nakahara,
Tsutomu Sasao,
Munehiro Matsuura:
A Design Algorithm for Sequential Circuits Using LUT Rings.
IEICE Transactions 88-A(12): 3342-3350 (2005) |
