2001 | ||
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2 | Ruchira Kamdar, Seetharam Gundurao, Rajiv V. Joshi, N. S. Murty: IBM's Blue Logic Design Methodology-Circuits and Physical Design. VLSI Design 2001: 11-12 | |
1997 | ||
1 | EE | R. V. Raj, N. S. Murty, P. S. Nagendra Rao, Lalit M. Patnaik: Effective Heuristics for Timing Driven Constructive Placement. VLSI Design 1997: 38-45 |
1 | Seetharam Gundurao | [2] |
2 | Rajiv V. Joshi | [2] |
3 | Ruchira Kamdar | [2] |
4 | Lalit M. Patnaik | [1] |
5 | R. V. Raj | [1] |
6 | P. S. Nagendra Rao | [1] |