| 2008 |
|---|
| 5 | EE | Petr Matousek,
Jaroslav Ráb,
Ondrej Rysavy,
Miroslav Svéda:
A Formal Model for Network-Wide Security Analysis.
ECBS 2008: 171-181 |
| 2006 |
|---|
| 4 | EE | Ales Smrcka,
Vojtech Rehák,
Tomás Vojnar,
David Safránek,
Petr Matousek,
Z. Rehák:
Verifying VHDL Designs with Multiple Clocks in SMV.
FMICS/PDMC 2006: 148-164 |
| 2005 |
|---|
| 3 | EE | Petr Matousek,
Ales Smrcka,
Tomás Vojnar:
High-Level Modelling, Analysis, and Verification on FPGA-Based Hardware Design.
CHARME 2005: 371-375 |
| 2004 |
|---|
| 2 | EE | Petr Matousek:
Tools for Parametric Verification. A Comparison on a Case Study.
J. UCS 10(10): 1469-1494 (2004) |
| 2003 |
|---|
| 1 | | Petr Matousek:
Verification of Workflow Specification Standards.
ICEIS Doctoral Consortium 2003: 8-11 |
