| 2004 |
|---|
| 4 | | Amaury Nève,
Helmut Schettler,
Thomas Ludwig,
Denis Flandre:
Power-delay product minimization in high-performance 64-bit carry-select adders.
IEEE Trans. VLSI Syst. 12(3): 235-244 (2004) |
| 2002 |
|---|
| 3 | EE | Amaury Nève,
Denis Flandre,
Helmut Schettler,
Thomas Ludwig,
Gerhard Hellner:
Design of a branch-based 64-bit carry-select adder in 0.18 µm partially depleted SOI CMOS.
ISLPED 2002: 108-111 |
| 1998 |
|---|
| 2 | EE | Jürgen Koehl,
Ulrich Baur,
Thomas Ludwig,
Bernhard Kick,
Thomas Pflueger:
A Flat, Timing-Driven Design System for a High-Performance CMOS Processor Chipset.
DATE 1998: 312-320 |
| 1997 |
|---|
| 1 | EE | Bernhard Kick,
Ulrich Baur,
Jürgen Koehl,
Thomas Ludwig,
Thomas Pflueger:
Standard-cell-based design methodology for high-performance support chips.
IBM Journal of Research and Development 41(4&5): 505-514 (1997) |
