| |
| 1999 | ||
|---|---|---|
| 4 | EE | Le-Chin Eugene Liu, Carl Sechen: Multilayer chip-level global routing using an efficient graph-based Steiner tree heuristic. IEEE Trans. on CAD of Integrated Circuits and Systems 18(10): 1442-1451 (1999) |
| 3 | EE | Le-Chin Eugene Liu, Carl Sechen: Multilayer pin assignment for macro cell circuits. IEEE Trans. on CAD of Integrated Circuits and Systems 18(10): 1452-1461 (1999) |
| 1998 | ||
| 2 | EE | Le-Chin Eugene Liu, Hsiao-Ping Tseng, Carl Sechen: Chip-level area routing. ISPD 1998: 197-204 |
| 1997 | ||
| 1 | EE | Le-Chin Eugene Liu, Carl Sechen: Multi-layer chip-level global routing using an efficient graph-based Steiner tree heuristic. ED&TC 1997: 311-318 |
| 1 | Carl Sechen | [1] [2] [3] [4] |
| 2 | Hsiao-Ping Tseng | [2] |