| |
| 2008 | ||
|---|---|---|
| 3 | EE | Fan-Min Li, Cheng-Hung Lin, An-Yeu Wu: Unified Convolutional/Turbo Decoder Design Using Tile-Based Timing Analysis of VA/MAP Kernel. IEEE Trans. VLSI Syst. 16(10): 1358-1371 (2008) |
| 2007 | ||
| 2 | EE | Fan-Min Li, An-Yeu Wu: On the New Stopping Criteria of Iterative Turbo Decoding by Using Decoding Threshold. IEEE Transactions on Signal Processing 55(11): 5506-5516 (2007) |
| 2004 | ||
| 1 | Kai Huang, Fan-Min Li, Pei-Ling Shen, An-Yeu Wu: VLSI design of dual-mode Viterbi/turbo decoder for 3GPP. ISCAS (2) 2004: 773-776 | |
| 1 | Kai Huang | [1] |
| 2 | Cheng-Hung Lin | [3] |
| 3 | Pei-Ling Shen | [1] |
| 4 | An-Yeu Wu | [1] [2] [3] |