Pei-Ling Shen
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2004
1
Kai Huang
,
Fan-Min Li
, Pei-Ling Shen,
An-Yeu Wu
: VLSI design of dual-mode Viterbi/turbo decoder for 3GPP.
ISCAS (2) 2004
: 773-776
Coauthor
Index
1
Kai Huang
[
1
]
2
Fan-Min Li
[
1
]
3
An-Yeu Wu
[
1
]
Copyright ©
Sun May 17 03:24:02 2009 by
Michael Ley
(
ley@uni-trier.de
)
