dblp.uni-trier.dewww.uni-trier.de

Walter Lee

List of publications from the DBLP Bibliography Server - FAQ
Coauthor Index - Ask others: ACM DL/Guide - CiteSeer - CSB - Google - MSN - Yahoo

2005
13EEMichael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Scalar Operand Networks. IEEE Trans. Parallel Distrib. Syst. 16(2): 145-162 (2005)
2004
12EEMichael Bedford Taylor, Walter Lee, Jason E. Miller, David Wentzlaff, Ian Bratt, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jason Sungtae Kim, James Psota, Arvind Saraf, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal: Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams. ISCA 2004: 2-13
2003
11EEMichael Bedford Taylor, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Scalar Operand Networks: On-Chip Interconnect for ILP in Partitioned Architecture. HPCA 2003: 341-353
2002
10EEWalter Lee, Diego Puppin, Shane Swenson, Saman P. Amarasinghe: Convergent scheduling. MICRO 2002: 111-122
9EEMichael Bedford Taylor, Jason Sungtae Kim, Jason E. Miller, David Wentzlaff, Fae Ghodrat, Ben Greenwald, Henry Hoffmann, Paul Johnson, Jae-Wook Lee, Walter Lee, Albert Ma, Arvind Saraf, Mark Seneski, Nathan Shnidman, Volker Strumpen, Matthew Frank, Saman P. Amarasinghe, Anant Agarwal: The Raw Microprocessor: A Computational Fabric for Software Circuits and General-Purpose Programs. IEEE Micro 22(2): 25-35 (2002)
2001
8EEJeffrey Sheldon, Walter Lee, Ben Greenwald, Saman P. Amarasinghe: Strength Reduction of Integer Division and Modulo Operations. LCPC 2001: 254-273
7EERajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Compiler Support for Scalable and Efficient Memory Systems. IEEE Trans. Computers 50(11): 1234-1247 (2001)
1999
6EEJonathan Babb, Martin C. Rinard, Csaba Andras Moritz, Walter Lee, Matthew Frank, Rajeev Barua, Saman P. Amarasinghe: Parallelizing Applications into Silicon. FCCM 1999: 70-
5EERajeev Barua, Walter Lee, Saman P. Amarasinghe, Anant Agarwal: Maps: A Compiler-Managed Memory System for Raw Machines. ISCA 1999: 4-15
1998
4EEWalter Lee, Rajeev Barua, Matthew Frank, Devabhaktuni Srikrishna, Jonathan Babb, Vivek Sarkar, Saman P. Amarasinghe: Space-Time Scheduling of Instruction-Level Parallelism on a Raw Machine. ASPLOS 1998: 46-57
3EEKenneth Mackenzie, John Kubiatowicz, Matthew Frank, Walter Lee, Victor Lee, Anant Agarwal, M. Frans Kaashoek: Exploiting Two-Case Delivery for Fast Protected Messaging. HPCA 1998: 231-242
1997
2 Walter Lee, Matthew Frank, Victor Lee, Kenneth Mackenzie, Larry Rudolph: Implications of I/O for Gang Scheduled Workloads. JSSPP 1997: 215-237
1 Elliot Waingold, Michael Taylor, Devabhaktuni Srikrishna, Vivek Sarkar, Walter Lee, Victor Lee, Jang Kim, Matthew Frank, Peter Finch, Rajeev Barua, Jonathan Babb, Saman P. Amarasinghe, Anant Agarwal: Baring It All to Software: Raw Machines. IEEE Computer 30(9): 86-93 (1997)

Coauthor Index

1Anant Agarwal [1] [3] [5] [7] [9] [11] [12] [13]
2Saman P. Amarasinghe [1] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
3Jonathan Babb [1] [4] [6]
4Rajeev Barua [1] [4] [5] [6] [7]
5Ian Bratt [12]
6Peter Finch [1]
7Matthew Frank [1] [2] [3] [4] [6] [9] [12]
8Fae Ghodrat [9]
9Ben Greenwald [8] [9] [12]
10Henry Hoffmann (Hank Hoffmann) [9] [12]
11Paul Johnson [9] [12]
12M. Frans Kaashoek [3]
13Jang Kim [1]
14Jason Sungtae Kim [9] [12]
15John Kubiatowicz [3]
16Jae-Wook Lee [9]
17Victor Lee [1] [2] [3]
18Albert Ma [9]
19Kenneth Mackenzie [2] [3]
20Jason E. Miller [9] [12]
21Csaba Andras Moritz [6]
22James Psota [12]
23Diego Puppin [10]
24Martin C. Rinard [6]
25Larry Rudolph [2]
26Arvind Saraf [9] [12]
27Vivek Sarkar [1] [4]
28Mark Seneski [9]
29Jeffrey Sheldon [8]
30Nathan Shnidman [9] [12]
31Devabhaktuni Srikrishna [1] [4]
32Volker Strumpen [9] [12]
33Shane Swenson [10]
34Michael Taylor [1]
35Michael Bedford Taylor [9] [11] [12] [13]
36Elliot Waingold [1]
37David Wentzlaff [9] [12]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)