| |
| 1996 | ||
|---|---|---|
| 5 | EE | Paul E. Landman: High-level power estimation. ISLPED 1996: 29-35 |
| 4 | EE | Paul E. Landman, Renu Mehra, Jan M. Rabaey: An Integrated CAD Environment for Low-Power Design. IEEE Design & Test of Computers 13(2): 72-82 (1996) |
| 3 | EE | Paul E. Landman, Jan M. Rabaey: Activity-sensitive architectural power analysis. IEEE Trans. on CAD of Integrated Circuits and Systems 15(6): 571-587 (1996) |
| 1995 | ||
| 2 | EE | Paul E. Landman, Jan M. Rabaey: Activity-sensitive architectural power analysis for the control path. ISLPD 1995: 93-98 |
| 1 | EE | Paul E. Landman, Jan M. Rabaey: Architectural power analysis: The dual bit type method. IEEE Trans. VLSI Syst. 3(2): 173-187 (1995) |
| 1 | Renu Mehra | [4] |
| 2 | Jan M. Rabaey | [1] [2] [3] [4] |