| 1996 |
|---|
| 9 | EE | William K. C. Lam,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Valid clock frequencies and their computation in wavepipelined circuits.
IEEE Trans. on CAD of Integrated Circuits and Systems 15(7): 791-807 (1996) |
| 1995 |
|---|
| 8 | EE | William K. C. Lam,
Alexander Saldanha,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Delay fault coverage, test set size, and performance trade-offs.
IEEE Trans. on CAD of Integrated Circuits and Systems 14(1): 32-44 (1995) |
| 1994 |
|---|
| 7 | | William K. C. Lam,
Robert K. Brayton:
Criteria for the Simple Path Property in Timed Automata.
CAV 1994: 27-40 |
| 6 | EE | William K. C. Lam,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Exact Minimum Cycle Times for Finite State Machines.
DAC 1994: 100-105 |
| 1993 |
|---|
| 5 | | William K. C. Lam,
Robert K. Brayton:
Alternating RQ Timed Automata.
CAV 1993: 237-252 |
| 4 | EE | William K. C. Lam,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Circuit Delay Models and Their Exact Computation Using Timed Boolean Functions.
DAC 1993: 128-134 |
| 3 | EE | William K. C. Lam,
Alexander Saldanha,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Delay Fault Coverage and Performance Tradeoffs.
DAC 1993: 446-452 |
| 1992 |
|---|
| 2 | EE | William K. C. Lam,
Robert K. Brayton,
Alberto L. Sangiovanni-Vincentelli:
Valid clocking in wavepipelined circuits.
ICCAD 1992: 518-525 |
| 1 | | William K. C. Lam,
Robert K. Brayton:
On Relationship Between ITE and BDD.
ICCD 1992: 448-451 |
