K. Y. Ko

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3EEK. Y. Ko, Mike W. T. Wong, Y. S. Lee: Testing System-On-Chip by Summations of Cores? Test Output Voltages. Asian Test Symposium 2002: 350-355
2EEMike W. T. Wong, K. Y. Ko, Y. S. Lee: Analog and Mixed-Signal IP Cores Testing. DELTA 2002: 3-7
1EEK. Y. Ko, Mike W. T. Wong: New built-in self-test technique based on addition/subtraction of selected node voltages. Asian Test Symposium 2000: 39-

Coauthor Index

1Y. S. Lee [2] [3]
2Mike W. T. Wong [1] [2] [3]

Copyright © Sun May 17 03:24:02 2009 by Michael Ley (ley@uni-trier.de)