| |
| 2008 | ||
|---|---|---|
| 2 | EE | Igor Keller, King Ho Tam, Vinod Kariat: Challenges in gate level modeling for delay and SI at 65nm and below. DAC 2008: 468-473 |
| 2003 | ||
| 1 | EE | Ken Tseng, Vinod Kariat: Static noise analysis with noise windows. DAC 2003: 864-868 |
| 1 | Igor Keller | [2] |
| 2 | King Ho Tam | [2] |
| 3 | Ken Tseng | [1] |