| |
| 1999 | ||
|---|---|---|
| 7 | EE | Spyros Tragoudas, Dimitrios Karayiannis: A fast nonenumerative automatic test pattern generator for pathdelay faults. IEEE Trans. on CAD of Integrated Circuits and Systems 18(7): 1050-1057 (1999) |
| 1998 | ||
| 6 | EE | Dimitrios Karayiannis, Spyros Tragoudas: A Nonenumerative ATPG for Functionally Sensitizable Path Delay Faults. VTS 1998: 440-445 |
| 1997 | ||
| 5 | Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis: Nonenumerative Path Delay Fault Coverage Estimation with Optimal Algorithms. ICCD 1997: 366-371 | |
| 4 | EE | Dimitrios Kagaris, Spyros Tragoudas, Dimitrios Karayiannis: Improved nonenumerative path-delay fault-coverage estimation based on optimal polynomial-time algorithms. IEEE Trans. on CAD of Integrated Circuits and Systems 16(3): 309-315 (1997) |
| 3 | EE | Spyros Tragoudas, Dimitrios Karayiannis: Implementing and clustering modules with complex delays. Integration 22(1-2): 39-57 (1997) |
| 1996 | ||
| 2 | Dimitrios Karayiannis, Spyros Tragoudas: ATPD: An Automatic Test Pattern Generator for Path Delay Faults. ITC 1996: 443-452 | |
| 1995 | ||
| 1 | EE | Dimitrios Karayiannis, Spyros Tragoudas: Uniform area timing-driven circuit implementation. Great Lakes Symposium on VLSI 1995: 2-7 |
| 1 | Dimitrios Kagaris (Dimitri Kagaris) | [4] [5] |
| 2 | Spyros Tragoudas | [1] [2] [3] [4] [5] [6] [7] |