| 2008 |
|---|
| 13 | EE | Christopher James Langmead,
Sumit Kumar Jha:
Symbolic Approaches for Finding Control Strategies in Boolean Networks.
APBC 2008: 307-320 |
| 12 | EE | Edmund M. Clarke,
James R. Faeder,
Christopher James Langmead,
Leonard A. Harris,
Sumit Kumar Jha,
Axel Legay:
Statistical Model Checking in BioLab: Applications to the Automated Analysis of T-Cell Receptor Signaling Pathway.
CMSB 2008: 231-250 |
| 11 | EE | Susmit Jha,
Sumit Kumar Jha:
Randomization Based Probabilistic Approach to Detect Trojan Circuits.
HASE 2008: 117-124 |
| 10 | EE | Sumit Kumar Jha,
Susmit Jha:
Random Relaxation Abstractions for Bounded Reachability Analysis of Linear Hybrid Automata: Distributed Randomized Abstractions in Model Checking.
HASE 2008: 147-153 |
| 9 | EE | Goran Frehse,
Sumit Kumar Jha,
Bruce H. Krogh:
A Counterexample-Guided Approach to Parameter Synthesis for Linear Hybrid Automata.
HSCC 2008: 187-200 |
| 8 | EE | Sumit Kumar Jha:
d-IRA: A Distributed Reachability Algorithm for Analysis of Linear Hybrid Automata.
HSCC 2008: 618-621 |
| 2007 |
|---|
| 7 | EE | Sumit Kumar Jha,
Bruce H. Krogh,
James E. Weimer,
Edmund M. Clarke:
Reachability for Linear Hybrid Automata Using Iterative Relaxation Abstraction.
HSCC 2007: 287-300 |
| 6 | EE | Krishna K. Mehra,
Sriram K. Rajamani,
A. Prasad Sistla,
Sumit Kumar Jha:
Verification of Object Relational Maps.
SEFM 2007: 283-292 |
| 5 | EE | Christopher James Langmead,
Sumit Kumar Jha:
Predicting Protein Folding Kinetics Via Temporal Logic Model Checking.
WABI 2007: 252-264 |
| 4 | EE | Sumit Kumar Jha:
Design of a Distributed Reachability Algorithm for Analysis of Linear Hybrid Automata
CoRR abs/0710.3764: (2007) |
| 2006 |
|---|
| 3 | EE | Sumit Kumar Jha:
Numerical Simulation guided Lazy Abstraction Refinement for Nonlinear Hybrid Automata
CoRR abs/cs/0611051: (2006) |
| 2005 |
|---|
| 2 | EE | Ansgar Fehnker,
Edmund M. Clarke,
Sumit Kumar Jha,
Bruce H. Krogh:
Refining Abstractions of Hybrid Systems Using Counterexample Fragments.
HSCC 2005: 242-257 |
| 1 | | Edmund M. Clarke,
Ansgar Fehnker,
Sumit Kumar Jha,
Helmut Veith:
Temporal Logic Model Checking.
Handbook of Networked and Embedded Control Systems 2005: 539-558 |
