2009 |
4 | EE | Alan Mishchenko,
Robert K. Brayton,
Jie-Hong Roland Jiang,
Stephen Jang:
Scalable don't-care-based logic optimization and resynthesis.
FPGA 2009: 151-160 |
3 | EE | Stephen Jang,
Dennis Wu,
Mark Jarvin,
Billy Chan,
Kevin Chung,
Alan Mishchenko,
Robert K. Brayton:
SmartOpt: an industrial strength framework for logic synthesis.
FPGA 2009: 237-240 |
2008 |
2 | EE | Stephen Jang,
Billy Chan,
Kevin Chung,
Alan Mishchenko:
WireMap: FPGA technology mapping for improved routability.
FPGA 2008: 47-55 |
1 | EE | Alan Mishchenko,
Michael L. Case,
Robert K. Brayton,
Stephen Jang:
Scalable and scalably-verifiable sequential synthesis.
ICCAD 2008: 234-241 |